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A nonlinear CMOS analog cell for VLSI signal and information processing

机译:用于VLSI信号和信息处理的非线性CMOS模拟单元

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摘要

A simple reconfigurable continuous-time nonlinear CMOS building block for analog VLSI applications is presented. The new block is introduced as a basic analog cell for the implementation of analog VLSI systems. It simultaneously achieves four-quadrant multiplication and division. Its applications in both analog signal and information processing are discussed. These include multiplication, signal squaring, division, signal inversion, amplitude modulation, RMS-DC conversion, and neural computing. Using the new cell, a MOS VLSI implementation of a feedback/feedforward neural network is developed which achieves the scalar product of two n-tuple vectors by 4(n+1) MOS transistors and one operational amplifier. To verify the versatility of the new cell and its applications, experimental results obtained from a test chip that was fabricated using the MOSIS 2- mu m CMOS process are included.
机译:提出了一种用于模拟VLSI应用的简单的可重新配置的连续时间非线性CMOS构建块。引入了新模块,作为实现模拟VLSI系统的基本模拟单元。同时实现四象限乘法和除法。讨论了它在模拟信号和信息处理中的应用。这些包括乘法,信号平方,除法,信号求逆,幅度调制,RMS-DC转换和神经计算。使用新单元,开发了反馈/前馈神经网络的MOS VLSI实现,该实现通过4(n + 1)个MOS晶体管和一个运算放大器实现了两个n元组矢量的标量积。为了验证新电池的多功能性及其应用,还包括使用MOSIS 2微米CMOS工艺制造的测试芯片获得的实验结果。

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