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A CMOS logarithmic IF amplifier with unbalanced source-coupled pairs

机译:具有不平衡源耦合对的CMOS对数IF放大器

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摘要

A CMOS logarithmic intermediate-frequency (IF) amplifier that is applied to mobile telecommunications equipment is presented. The CMOS logarithmic IF amplifier has pseudologarithmic rectifiers made from parallel-connecting full-wave rectifiers, consisting of unbalanced source-coupled pairs with the cross-coupled input stage and parallel-connected output stage. A +or-3-dB logarithmic accuracy, a 90-dB input dynamic range, and a -30 to 80 degrees C operating temperature range were achieved with the 1.3- mu m double-polysilicon n-well CMOS process. Typical power consumption by the logarithmic IF amplifier in the fabricated CMOS LSI was 5.5 mW. The block area for the logarithmic IF amplifier was 0.8 mm/sup 2/.
机译:提出了一种应用于移动通信设备的CMOS对数中频(IF)放大器。 CMOS对数IF放大器具有由对接的全波整流器制成的对数整流器,该整流器由不平衡的源极耦合对,交叉耦合的输入级和并联的输出级组成。使用1.3微米的双多晶硅n阱CMOS工艺可实现+或3-dB的对数精度,90 dB的输入动态范围以及-30至80摄氏度的工作温度范围。在制造的CMOS LSI中,对数IF放大器的典型功耗为5.5 mW。对数IF放大器的模块面积为0.8 mm / sup 2 /。

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