A Gigabit Ethernet interface with an embedded lossless data encoder on FPGA

摘要

This paper proposes a high speed data encoder, which is dedicated to encode data sent by a gigabit Ethernet interface. The main aim of this encoder is not to achieve high bitrate reduction, but to create the coder, which can be efficiently implemented on FPGA and easily modified according to different content. This encoder can be added to existing systems and greatly reduce the network load by a small change in the FPGA project design.