PHYSICAL MECHANISMS OF DIELECTRIC BREAKDOWN IN SiO_2 FOR THE RANGE OF -150℃ TO 150℃

摘要

This paper explains the physical nature of breakdown for 10 nm oxide in the range of -150℃ to 150℃ for N- and P-channel devices (NFETs and PFETs). At 30℃, two mechanisms occur: trap creation and impact ionization; at lower temperatures, the trap creation is significantly suppressed with a corresponding decrease in activation energy. Using the physical model, the reliability of NFETs is compared with what the PFETs relative to processing conditions.