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A Process for Fabricating High Current Circuits With High interconnect Density

机译:具有高互连密度的大电流电路的制造工艺

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摘要

Currently there is no cost-effective technology available for fabricating copper interconnect with thickness greater than 4 mils and large cross sectional area. In contrast to the photoresist laminate manufacturer's recommended procedure, a thick photoresist layer was achieved by laminating two layers sequentially on a substrate. Procedures for patterning, developing, and stripping the thick photoresist layer were developed. A process for making greater than 4-mil-thick copper conductors with an aspect ratio of 1:1 in a 10-mil pitch has been developed and its feasibility demonstrated. The new process will offer a significant advantage in designing and producing high-current circuits with high interconnect density, and requiring low conductor resistance for avoiding signal degradation and minimizing power dissipation.
机译:当前,尚无成本有效的技术可用于制造厚度大于4密耳且横截面积较大的铜互连。与光致抗蚀剂层压板制造商推荐的步骤相反,通过在基材上依次层压两层来获得较厚的光致抗蚀剂层。开发了用于图案化,显影和剥离厚光致抗蚀剂层的程序。已经开发出一种以10密耳的间距制造纵横比为1:1的大于4密耳的铜导体的方法,并证明了其可行性。新工艺将在设计和生产具有高互连密度的高电流电路方面具有显着优势,并且要求低导体电阻以避免信号降级并最大程度地降低功耗。

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