Performance analysis of an input queueing ATM switch with two priority classes

摘要

In this paper, we study an input queueing asynchronous transfer(ATM)switch with the preemptive priority scheme. Up to now, many researchers have studied this switch, but their models do not yield accurate results. Therefore, we propose Another model and analyze the performance of the switch for two different arrival processes, that is, the independent priority Arrival process(IPAP)and the dependent priority arrival process(DPAP). In this paper, we model a virtual head of line(HOL) Queue like the previous works, and analyze it using a three-dimensional Markov chain.