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Comparative Characterization of SPEC CPU2000 and CPU2006 on Itanium ® Architecture

机译:在Itanium®架构上SPEC CPU2000和CPU2006的比较特性

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摘要

Recently SPEC released the next generation of its CPU benchmark, widely used by compiler writers and architects for measuring processor performance. This calls for characterization of the applications in SPEC CPU2006 to guide the design of future microprocessors. In addition, it necessitates assessing the change in the characteristics of the applications from one suite to another. Although similar studies using the retired SPEC CPU benchmark suites have been done in the past, to the best of our knowledge, a thorough characterization of CPU2006 and its comparison with CPU2000 has not been done so far. In this paper, we present the above; specifically, we analyze IPC (instructions per cycle), L1, L2 data cache misses and branch prediction, especially in CPU2006.rnCategories and Subject Descriptors
机译:最近,SPEC发布了其下一代CPU基准测试,该标准已被编译器作者和架构师广泛用于评估处理器性能。这要求对SPEC CPU2006中的应用程序进行表征,以指导未来的微处理器设计。另外,它有必要评估应用程序特性从一个套件到另一个套件的变化。尽管过去已经使用退休的SPEC CPU基准套件进行了类似的研究,但据我们所知,到目前为止,尚未对CPU2006进行全面的表征以及将其与CPU2000进行比较。在本文中,我们介绍了以上内容;具体来说,我们分析IPC(每个周期的指令),L1,L2数据高速缓存未命中和分支预测,尤其是在CPU2006中。rn类别和主题描述符

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