ON THE PERFORMANCE AND TECHNOLOGICAL IMPACT OF ADDING MEMORY CONTROLLERS IN MULTI-CORE PROCESSORS

摘要

The increasing core-count on current and future processors is posing critical chal-nlenges to the memory subsystem to efficiently handle concurrent memory requests. Thencurrent trend is to increase the number of memory channels available to the proces-nsor’s memory controller. In this paper we investigate the advantages and disadvantagesnof this approach from both a technological and an application performance viewpoint.nIn particular, we explore the trade-off between employing multiple memory channelsnper memory controller and the use of multiple memory controllers with fewer memorynchannels. Experiments conducted on two current state-of-the-art multi-core processors,na 6-core AMD Istanbul and a 4-core Intel Nehalem-EP, using the STREAM benchmarknand a wide range of production applications. An analytical model of the STREAM perfor-nmance is used to illustrate the diminishing return obtained when increasing the numbernof memory channels per memory controller whose effect is also seen in the applicationnperformance. In addition, we show that this performance degradation can be efficientlynaddressed by increasing the ratio of memory controllers to channels while keeping thennumber of memory channels constant. Significant performance improvements can benachieved in this scheme, up to 28%, in the case of using two memory controllers eachnwith one channel compared with one controller with two memory channels.