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Parallel job scheduling for power constrained HPC systems

机译:功率受限的HPC系统的并行作业调度

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摘要

Power has become the primary constraint in high performance computing. Traditionally, parallel job scheduling policies have been designed to improve certain job performance metrics when scheduling parallel workloads on a system with a given number of processors. The available number of processors is not anymore the only limitation in parallel job scheduling. The recent increase in processor power consumption has resulted in a new limitation: the available power. Given constraints naturally lead to an optimization problem. We proposed MaxJobPerf, a new parallel job scheduling policy based on integer linear programming. Dynamic Voltage Frequency Scaling (DVFS) is a widely used technique that running applications at reduced CPU frequency/voltage trades increased execution time for power reduction. The optimization problem determines which jobs should run and at which frequency. In this paper, we compare the MaxJobPerf policy against other power budgeting policies for different power budgets. It clearly outperforms the other power-budgeting approaches at the parallel job scheduling level. Furthermore, we give a detailed analysis of the policy parameters including a discussion on how to manage job reservations to avoid job starvation.
机译:功耗已成为高性能计算的主要限制。传统上,并行作业调度策略已设计为在具有给定数量的处理器的系统上调度并行工作负载时改善某些作业性能指标。可用的处理器数量不再是并行作业调度中的唯一限制。最近处理器功耗的增加导致了一个新的限制:可用功率。给定的约束自然会导致优化问题。我们提出了MaxJobPerf,这是一种基于整数线性规划的新并行作业调度策略。动态电压频率缩放(DVFS)是一种广泛使用的技术,它以降低的CPU频率/电压运行应用程序以增加执行时间来降低功耗。优化问题决定了应该运行哪些作业以及以哪个频率运行。在本文中,我们将MaxJobPerf策略与其他针对不同功率预算的功率预算策略进行了比较。在并行作业调度级别,它明显优于其他功耗预算方法。此外,我们对政策参数进行了详细分析,其中包括有关如何管理职位保留以避免工作饥饿的讨论。

著录项

  • 来源
    《Parallel Computing》 |2012年第12期|615-630|共16页
  • 作者单位

    Computer Science Department, Barcelona Supercomputing Center, Barcelona, Spain Department of Computer Architecture, Technical University of Catalonia, Barcelona, Spain;

    Computer Science Department, Barcelona Supercomputing Center, Barcelona, Spain Department of Computer Architecture, Technical University of Catalonia, Barcelona, Spain;

    Computer Science Department, Barcelona Supercomputing Center, Barcelona, Spain Department of Computer Architecture, Technical University of Catalonia, Barcelona, Spain;

    Computer Science Department, Barcelona Supercomputing Center, Barcelona, Spain Department of Computer Architecture, Technical University of Catalonia, Barcelona, Spain;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    power budget; CPU power consumption; parallel job scheduling;

    机译:功率预算;CPU功耗;并行作业调度;

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