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A 41 ps ASIC time-to-digital converter for physics experiments

机译:用于物理实验的41 ps ASIC时间数字转换器

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摘要

We present a novel Time-to-Digital (TDC) converter for physics experiments. Proposed TDC is based on a synchronous counter and an asynchronous fine interpolator. The fine part of the measurement is obtained using NORA inverters that provide improved resolution. A prototype IC was fabricated in 180 nm CMOS technology. Experimental measurements show that proposed TDC features 41 ps resolution associated with 0.35LSB differential non-linearity, 0.77LSB integral non-linearity and a negligible single shot precision. The whole dynamic range is equal to 18 μs. The proposed TDC is designed using a flash architecture that reduces dead time. Data reported in the paper show that our design is well suited for present and future particle physics experiments.
机译:我们提出了一种用于物理实验的新型时间数字(TDC)转换器。提议的TDC基于同步计数器和异步精细内插器。使用提供改善分辨率的NORA逆变器可以获得测量的精细部分。原型IC采用180 nm CMOS技术制造。实验测量表明,建议的TDC具有41 ps的分辨率,具有0.35LSB的差分非线性,0.77LSB的积分非线性和可忽略的单发精度。整个动态范围等于18μs。提议的TDC是使用闪存架构设计的,可减少死区时间。论文中报道的数据表明,我们的设计非常适合当前和未来的粒子物理实验。

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  • 作者单位

    Department of Physics, University of Napoli "Federico II", Via Cintia Complesso Univ. Monte S. Angelo 80126, Naples, Italy;

    Department of Electronic Engineer, University of Napoli "Federico Ⅱ", Via Caludio 21 80125, Naples, Italy;

    Department of Electronic Engineer, University of Napoli "Federico Ⅱ", Via Caludio 21 80125, Naples, Italy;

    Department of Physics, University of Napoli "Federico II", Via Cintia Complesso Univ. Monte S. Angelo 80126, Naples, Italy;

    Department of Electronic Engineer, University of Napoli "Federico Ⅱ", Via Caludio 21 80125, Naples, Italy;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    TDC; tof; delay line; ASIC;

    机译:贸发局;到F;延迟线;ASIC;
  • 入库时间 2022-08-18 00:48:04

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