FPGA implementations of Grain v1, Mickey 2.0, Trivium, Lizard and Plantlet

摘要

In this paper, three eSTREAM Portfolio 2 ciphers: Grain v1, Mickey 2.0 and Trivium, and two Grain-like stream ciphers: Lizard and Plantlet are implemented in three versions aimed at different hardware application purposes. The hardware platform adopts Xilinx's Spartan7 serial, and the simulations, syntheses and implementations are conducted in Vivado using the Verilog hardware design language. These implementations are compared with each other and those presented in existing literature in terms of performance metrics including: throughput, area consumption and throughput-area ratio. The basic version of Trivium achieves the highest frequency reaching a maximum of 416 Mbps and the serial version consumes the smallest area of 13 slices. In the parallel version, the maximum throughput-area ratio is 165.5 Mbps/Slice achieved by Trivium. At the same time, the basic version of the Mickey 2.0 algorithm achieved the second highest frequency of 384 Mbps, and the serial version of the Grain v1 algorithm achieved the second smallest area with 26 slices.