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Low power & high gain differential amplifier using 16 nm FinFET

机译:使用16 nm FinFET的低功耗和高增益差分放大器

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A low noise, two-stage differential operational amplifiers are designed in 16nm FinFET technology are presented. The proposed design would be applied in high-speed system on chips (SOCs). The low leakage current, low power dissipation and high current driving abilities of the FinFET are taken into realization with a basic analog building block of OPAMP. In this proposed design dynamic biasing technique is used for enhancing the slew rate of the OPAMP. The input common mode range (ICMR) can be increased and the gain stability is improved by this technique. The performance of a differential amplifier is analyzed using mixed mode device and circuit simulation on FinFET in sub-16-nm node technologies. It observed that by using the FinFET based OPAMP has common mode rejection ratio is 76 dB with improved performance regarding the area, power, and bandwidth. The proposed design has less 1/f noise and better performance that can replace conventional MOSFET in low power Nano circuits. (C) 2019 Elsevier B.V. All rights reserved.
机译:介绍了一种采用16nm FinFET技术设计的低噪声,两级差分运算放大器。拟议的设计将应用于高速片上系统(SOC)。 FinFET的基本模拟构建模块实现了FinFET的低泄漏电流,低功耗和高电流驱动能力。在该提出的设计中,动态偏置技术用于提高OPAMP的压摆率。通过该技术,可以增加输入共模范围(ICMR)并提高增益稳定性。在16nm以下节点技术中,使用混合模式器件和FinFET上的电路仿真分析了差分放大器的性能。它观察到,通过使用基于FinFET的OPAMP,共模抑制比为76 dB,在面积,功率和带宽方面都有改进的性能。所提出的设计具有更低的1 / f噪声和更好的性能,可以替代低功率纳米电路中的常规MOSFET。 (C)2019 Elsevier B.V.保留所有权利。

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