Multi core SSL/TLS security processor architecture and its FPGA prototype design with automated preferential algorithm

摘要

In this paper a pipelined architecture of a high speed network security processor (NSP) for SSL/TLS protocol is implemented on a system on chip (SoC) where hardware information of all encryption, hashing and key exchange algorithms are stored in Secure Digital (SD) card in terms of bit files, in contrary to recent ones where all are actually implemented in hardware. The SoC works as NSP for the system (PC), which is running the application. Through the SoC the security algorithms are implemented and it also provides the Ethernet communication interface. The NSP finds applications in e-commerce, virtual private network (VPN) and in other fields that require data confidentiality.