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FLOAT WITHOUT BLOAT

机译:浮空不浮

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For years, ARC International has considered adding an optional floating-point unit (FPU) to its 32-bit customizable processor cores, but it has always been deterred by the cost of the additional logic gates and power. A fully equipped FPU with its own pipeline and register file could double or triple the silicon area of a small embedded RISC processor. At last week's Spring Processor Forum, ARC unveiled FPX-Floating-Point extensions-which significantly improve on the performance of a software-emulation library while requiring fewer gates than a complete FPU. ARC's solution is remarkably similar to the optional floating-point extensions for MicroBlaze v4.00 that Xilinx announced at the same session of SPF. One important difference is that ARC's extensions support both single- and double-precision operations, whereas the Xilinx extensions are limited to single-precision operations. (See MPR 5/17/05-02, "MicroBlaze Can Float.")
机译:多年以来,ARC International一直在考虑在其32位可定制处理器内核中添加一个可选的浮点单元(FPU),但始终受附加逻辑门和电源成本的困扰。具有自己的流水线和寄存器文件的功能齐全的FPU可以使小型嵌入式RISC处理器的硅面积增加一倍或两倍。在上周的春季处理器论坛上,ARC推出了FPX-Floating-Point扩展,该扩展显着改善了软件仿真库的性能,同时所需的门数少于完整的FPU。 ARC的解决方案与Xilinx在SPF的同一届会议上宣布的MicroBlaze v4.00的可选浮点扩展非常相似。一个重要的区别是ARC的扩展支持单精度和双精度操作,而Xilinx扩展仅限于单精度操作。 (请参阅MPR 5/17 / 05-02,“ MicroBlaze可以浮动”。)

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