MIPS Release 5 Extends SIMD

摘要

Although the shifting business issues at MIPS Technologies may be uncertain, we can still unwrap the company's end-of-the-year gift: a new instruction set architecture called MIPS Release 5 (R5). In the next few months, the keys to the MIPS architecture will likely pass to new owners. Imagination Technologies is the leading suitor, but Ceva has started a bidding war that sweetens the deal for shareholders and may delay the acquisition. Since both of the current bidders are CPU-IP companies, the MIPS team must support existing customers and continue updating the architecture. The MIPS R5 instruction-set architecture (ISA) is available now and adds support for virtuali-zation and SIMD vector processing. MIPS expects some licensees to introduce R5-based processors during 2013.