DEEP VISION OPTIMIZES AI DATA FLOW

摘要

Deep Vision's first AI chip, the ARA-1 inference coprocessor, introduces the company's patented polymorphic data-flow architecture. Its main goal is to minimize on-chip data movement by combining a software-managed scheduler with programmable execution cores. The design assumes each layer of a neural-network model has a different "best" computation and data-movement approach; in other words, no single configuration is efficient for all. Therefore, instead of implementing a predefined acceleration scheme in hardware, the silicon makes available to the software a set of flexible computation cores and data-management engines. The software then employs these units to follow the optimal execution plan for each neural-network subgraph.