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Analysis of retention tail distribution induced by scaled shallow trench isolation for high density DRAMs

机译:高密度DRAM的按比例缩放浅沟槽隔离引起的保留尾部分布分析

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摘要

The transistor hump induced by shallow trench isolation (STI) was quantitatively analyzed at the test site of DRAM product wafers, and it was directly correlated to the retention fail-bit distribution of the DRAMs. It was found that the hump magnitude tracks quite well the tail distribution of retention time failure, thus establishing a direct link between the hump magnitude estimated from the test transistors and the retention time distribution of the product.
机译:由浅沟槽隔离(STI)引起的晶体管驼峰在DRAM产品晶圆的测试位置进行了定量分析,并且与DRAM的保留失效位分布直接相关。发现驼峰幅度很好地跟踪了保持时间失效的尾部分布,因此在根据测试晶体管估算的驼峰幅度与产品的保持时间分布之间建立了直接联系。

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