Experimental and simulation analysis of a BCD ESD protection element under the DC and TLP stress conditions

摘要

A BCD technology electrostatic discharge (ESD) protection npn transistor device is analyzed experimentally and by device simulation. At low DC current conditions, emission microscopy and optical beam induced current (OBIC) techniques are used to investigate the current flow homogeneity and electric field profile. At high current ESD conditions, the device internal behavior was characterized by a backside transient interferometric mapping technique. The thermal distribution along the device obtained by the laser interferometric thermal mapping technique is correlated with the emission and OBIC experiments. The experimental IV characteristics, maximum electric field and the activity of a lateral and vertical parts of the npn transistor are well reproduced by the simulation.