A New Procedure to Define the Zero-Field Condition and to Delineate pn-Junctions in Silicon Devices by Scanning Capacitance Microscopy

摘要

Basing on theoretical considerations and on physical simulations, a new procedure is proposed to define the location of the electrical junction in pn-junctions by Scanning Capacitance Microscopy and to extract at the same time the related zero-field condition. Applications of this procedure are shown in the case of epitaxial and shallow junctions.