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Evaluation of wire bonding performance, process conditions, and metallurgical integrity of chip on board wire bonds

机译:评估引线键合性能,工艺条件和板上芯片引线键合的冶金学完整性

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摘要

Chip on board wire bonding presents challenges to modern wire bonding technology which include smaller, closely spaced wire bond pads; bonding to soft substrates without special processing and pad construction; and diverse first bond and second bond metallurgies. These challenges are addressed by extensive bonding accuracy tests, a design of experiments approach for optimizing wire bond process parameters, reliability testing, and detailed materials characterization of the metallurgical integrity of the wire bonds. The thermo-mechanical integrity of the wire bond interconnects was evaluated by wire pull and hot storage tests. Hot storage testing allowed for detection of samples with an electrolytic gold surface finish that was too thin, and exhibited a contamination-corrosion condition of the nickel under-plating. Other samples with an excessively thick, rough textured nickel under-plating layer exhibited poor wire bond-ability. The methodology of materials analyses of the metallurgy of the wire bond interconnects is described. The paper illustrates a wire bond lift technique that is used to inspect for cratering damage and the "area-uniformity" of gold aluminum intermetallics. An improved understanding of the wire bonding process was achieved by showing the dependence of the visual appearance of the wire bonds on wire bond process parameters.
机译:芯片上芯片引线键合对现代引线键合技术提出了挑战,现代引线键合技术包括更小,间距很小的引线键合焊盘;无需特殊处理和焊盘结构即可粘接至软质基材;以及不同的第一键和第二键冶金。通过广泛的键合精度测试,用于优化线键合工艺参数的实验方法设计,可靠性测试以及线键合冶金完整性的详细材料表征,可以解决这些挑战。引线键合互连的热机械完整性通过引线拉力和热存储测试进行了评估。热存储测试允许检测具有过薄的电解金表面光洁度的样品,并表现出镍镀层的污染腐蚀状况。其他带有过厚,粗糙的镍镀层的样品均显示出较差的引线键合能力。描述了键合互连的冶金学的材料分析方法。本文介绍了一种引线键合提升技术,该技术用于检查缩孔损伤和金铝金属间化合物的“面积均匀性”。通过显示引线键合视觉外观对引线键合工艺参数的依赖性,可以更好地理解引线键合工艺。

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