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Electrothermal coupling analysis of current crowding and Joule heating in flip-chip packages

机译:倒装芯片封装中电流拥挤和焦耳热的电热耦合分析

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摘要

Solder bumps serve as electrical paths as well as structural support in a flip-chip package assembly. Owing to the differences of feature sizes and electric resistivities between a solder bump and its adjacent traces, current densities around the regions where traces connect the solder bump increase in a significant amount. This current crowding effect along with the induced Joule heating would accelerate fatigue failure due to electromigration. In this paper we apply the three-dimensional electrothermal coupling analysis to investigate current crowding and Joule heating in a flip-chip package assembly carrying different constant electric currents under different ambient temperatures. Experiments are conducted to calibrate temperature-dependent electric resistivities of solder alloy, Al trace, and Cu trace, and to verify the numerical model by comparing calculated and measured maximum temperatures on the die surface. Through the electrothermal coupling analysis, effects of current crowding and Joule heating induced by different solder bump structures are examined and compared.
机译:焊料凸点在倒装芯片封装组件中充当电气路径以及结构支撑。由于焊料凸块及其相邻迹线之间的特征尺寸和电阻率的差异,迹线连接焊料凸块的区域周围的电流密度显着增加。当前的拥挤效应以及感应的焦耳热会加速由于电迁移引起的疲劳破坏。在本文中,我们应用三维电热耦合分析来研究在不同环境温度下载有不同恒定电流的倒装芯片封装组件中的电流拥挤和焦耳热。进行实验以校准焊料合金,Al迹线和Cu迹线的温度相关电阻率,并通过比较在模具表面上计算和测量的最高温度来验证数值模型。通过电热耦合分析,研究并比较了不同焊料凸点结构引起的电流拥挤和焦耳热的影响。

著录项

  • 来源
    《Microelectronics & Reliability》 |2006年第8期|p.1357-1368|共12页
  • 作者

    Yi-Shao Lai; Chin-Li Kao;

  • 作者单位

    Stress-Reliability Lab, Advanced Semiconductor Engineering, Inc., 26 Chin 3rd Road, Nantze Export Processing Zone, 811 Nantze, Kaohsiung, Taiwan;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 一般性问题;
  • 关键词

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