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Lifetime estimation of analog circuits from the electrical characteristics of stressed MOSFETs

机译:根据应力MOSFET的电气特性估算模拟电路的寿命

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In this work, the impact of dielectric degradation in the MOSFET electrical characteristics after different levels of Fowler-Nordheim (FN) stress has been studied. A decrease in I_(SAT) and an increase of V_T have been observed. The interface trap density has been extracted from the sub-threshold slope of I_(D-)V_(GS) curves. The results show a direct relation between the generated interfacial traps and the observed changes in saturation current and threshold voltage. The wear out effects in the devices have been extrapolated to operation voltages, pointing out that the transistors can fulfill the reliability criteria, even when working in analog applications.
机译:在这项工作中,研究了在不同水平的Fowler-Nordheim(FN)应力后电介质降解对MOSFET电特性的影响。已经观察到I_(SAT)降低和V_T升高。已从I_(D-)V_(GS)曲线的亚阈值斜率提取了界面陷阱密度。结果表明,所产生的界面陷阱与所观察到的饱和电流和阈值电压的变化之间存在直接关系。器件中的磨损效应已推断到工作电压,指出即使在模拟应用中工作时,晶体管也可以满足可靠性标准。

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