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Study of copper drift during TDDB of intermetal dielectrics by using fully passivated MOS capacitors as test vehicle

机译:使用完全钝化的MOS电容器作为试验工具研究金属间电介质TDDB期间的铜漂移

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A fully passivated Metal-Oxide-Semiconductor (MOS) capacitor [Tokei Zs. Barrier integrity and reliability in copper low-k interconnects. ISTC 2005; 386-95] is used to study the intrinsic properties of a barrier between copper and dielectric in Back-End-Of-Line interconnects. Several barriers are studied and compared to each other. The test vehicle is also used to thoroughly investigate the role of thermal diffusion or field assisted ionic copper drift during Time-Dependent-Dielectric Breakdown (TDDB) by investigating the breakdown of dielectrics without a barrier at very low voltages.rnComparing different barriers revealed that a "standard" PVD-based Ta barrier has a significantly better TDDB-performance compared to an 8 nm SiCN-barrier.rnFor samples without barrier, it was found that long thermal anneals without the application of a stress voltage changes the distribution of failure times. Furthermore, the possibility of a bimodal distribution was argued when stressing these devices at a wide range of fields. A corollary is that, in presence of copper, both the E-model and the root-E-model do not apply for describing the experimental data obtained on these samples without barrier.
机译:完全钝化的金属氧化物半导体(MOS)电容器[Tokei Zs。铜质低k互连中的屏障完整性和可靠性。 ISTC 2005; [386-95]用于研究后端互连中铜和电介质之间的势垒的固有特性。研究并比较了几个障碍。通过研究电介质在极低电压下无阻挡层的击穿情况,该测试车还用于彻底研究时变介电击穿(TDDB)过程中热扩散或场助离子铜漂移的作用。与8 nm SiCN势垒相比,基于“ PVD”的Ta势垒具有明显更好的TDDB性能。对于没有势垒的样品,发现长时间的热退火而不施加应力电压会改变失效时间的分布。此外,当在广泛的领域对这些器件施加压力时,有人提出了双峰分布的可能性。一个必然的结论是,在存在铜的情况下,E模型和根E模型均不适用于描述在没有障碍的情况下从这些样品获得的实验数据。

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