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A Wafer-level Approach To Device Lifetesting

机译:晶圆级设备寿命测试方法

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摘要

An innovative wafer-level methodology is introduced and used to determine the thermal activation energies of TriQuint semiconductor's TQPED devices. Activation energies of 2.77 eV and 2.44 eV are calculated for the depletion-mode and enhancement-mode devices, respectively. This accelerated lifetest technique utilizes a special reliability test structure that includes an on-wafer heating element around the device under test (DUT). The heating element easily achieved temperature above 275 ℃ without the need to bias the device. This allows the exclusive study of thermally activated failure mechanisms. The special reliability test structure allows the stressing of individual devices at different temperatures on the same wafer. This built-in flexibility allows for a fast and efficient means of evaluating device reliability by eliminating packaging overhead and considerations. In wafer form it becomes possible to spatially map the reliability of devices under test. It is also easier to observe the physical degradation of devices and determine the failure mechanisms.
机译:引入了创新的晶圆级方法,并将其用于确定TriQuint半导体TQPED器件的热活化能。分别为耗尽型和增强型器件计算了2.77 eV和2.44 eV的激活能。这种加速的寿命测试技术利用了特殊的可靠性测试结构,该结构包括被测器件(DUT)周围的晶片上加热元件。加热元件可轻松达到275℃以上的温度,而无需偏置设备。这样就可以专门研究热激活失效机理。特殊的可靠性测试结构允许在同一温度下在不同温度下对单个器件施加压力。这种内置的灵活性允许通过消除封装开销和注意事项来快速有效地评估设备的可靠性。以晶片形式,有可能在空间上映射被测设备的可靠性。观察设备的物理退化并确定故障机制也更加容易。

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