A 0.18 μm CMOS ring VCO for clock and data recovery applications

摘要

In this paper, a 3.125 GHz four stage voltage controlled ring oscillator is presented. The oscillator has been designed in a 0.18 μm CMOS process with a 1.8 V supply. Behavioral simulations predict an 18% tuning range for the oscillator, with -91 dBc/Hz phase noise at 1 MHz offset Its power consumption has been simulated to be as low as 15.3 mW and the variation of its DC level of oscillation is 20 mV, which corresponds to 1.3% of its mean value. While consuming less area than an LC VCO, the proposed oscillator design achieves a more stable and reliable operation point.