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Edge current induced failure of semiconductor PN junction during operation in the breakdown region of electrical characteristic

机译:在电气特性击穿区域中,边缘电流导致半导体PN结工作期间的故障

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摘要

Typical blocking I-V characteristics are shown and analyzed for PN junctions exhibiting a breakdown region above 1000 V from commercial diodes and power MOSFETs. The leakage reverse current of PN junctions from commercial silicon devices available at this time has a flowing component at the semicon-ductor-passivant material interface around the junction edge.Part of the plotted experimental current-voltage characteristic fits to linear variation and deviation from this variation at higher applied voltage is attributed to non-controlled current flow in the interfacial layer, between the silicon and passivating material from the junction periphery. The thin interfacial layer including atomic layers both from the semiconductor and passivating dielectric material with fixed charges has imperfections resulted from the junction passivation process. For controlled-avalanche PN junctions no deviation from linear voltage dependence of the reverse current is possible until breakdown region practically at right knee appears. For other PN junctions deviation of the reverse current from linear variation results in a breakdown region with round knee and still with visible voltage dependence at current increase. Such soft breakdown region caused by the phenomena in the interfacial layer is exhibited at lower applied reverse voltage than the expected one for breakdown caused by charge carrier avalanche multiplication at the junction. Operation even for short in the soft breakdown region can lead to PN junction failure and for this reason, a maximum working permissible reverse voltage is specified in device data sheet with a value under the breakdown region. Junction failure consists in significantly lower reverse voltage than the initial one or even electrical short-circuit caused by a spot of material degradation in the interfacial layer from the junction periphery. Operation of the controlled-avalanche diode in the breakdown region is possible only for single pulse of short duration and at junction temperature not higher than 175 ℃. Above 150-175 ℃ even for controlled-avalanche diodes deviation from linear variation of the reverse current has been observed and soft breakdown region can appear before the expected avalanche breakdown. Device failure after operation in the breakdown region, caused by spot of material degradation at the junction periphery has occurred in such conditions. For high voltage commercial power MOSFETs operation in the avalanche breakdown region is limited to 150℃.
机译:示出并分析了典型的I-V阻塞特性,以分析PN结在商用二极管和功率MOSFET上的击穿区域是否超过1000V。商用硅器件此时PN结的泄漏反向电流在结边缘附近的半导体-钝化材料界面处具有流动分量,部分绘制的实验电流-电压特性与其线性变化和偏差相符施加高电压时的变化归因于界面层中非受控电流的流动,界面层中的硅和钝化材料来自结外围。包括来自半导体和具有固定电荷的钝化电介质材料的原子层的薄界面层具有由结钝化工艺导致的缺陷。对于可控雪崩的PN结,直到出现实际上在右膝盖处的击穿区域,才可能与反向电流的线性电压相关性没有偏差。对于其他PN结,反向电流与线性变化的偏差会导致击穿区域具有圆形拐点,并且在电流增加时仍具有可见的电压依赖性。由界面层中的现象引起的这种软击穿区域在低于施加的反向电压下呈现,该反向电压比由在结处的电荷载流子雪崩倍增引起的击穿所期望的反向电压低。即使在软击穿区中短时间运行也可能导致PN结故障,因此,器件数据手册中规定了最大工作允许反向电压,该值在击穿区以下。结故障的原因在于,反向电压比最初的短路甚至电气短路要低得多,这是由于界面层中从结外围开始的材料降解点引起的。仅对于短持续时间且结温不超过175℃的单个脉冲,才有可能在击穿区域中操作可控雪崩二极管。在150-175℃以上,即使对于可控雪崩二极管,也观察到了反向电流线性变化的偏离,并且在预期的雪崩击穿之前会出现软击穿区域。在这种情况下,已经发生了由击穿区域的材料降解引起的击穿区域中的器件故障。对于高压商用功率MOSFET,雪崩击穿区域的工作温度限制为150℃。

著录项

  • 来源
    《Microelectronics reliability 》 |2011年第3期| p.536-542| 共7页
  • 作者单位

    National R&D Institute for Micmtechnology (IMT) Bucharest, Romania;

    National R&D Institute for Micmtechnology (IMT) Bucharest, Romania;

    School of Electrical&Electronic Engineering, Nanyang Technological University, Singapore;

    Department of Electrical Engineering and Electronics, The Liverpool University, L69 3BX Liverpool, UK;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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