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Methodology for improvement of data retention in floating gate flash memory using leakage current estimation

机译:利用泄漏电流估计来改善浮栅闪存中数据保留的方法

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摘要

The importance of data retention characteristic is increased as the memory has been scaled down and multi-level programming. The leakage current of the inter-poly dielectric (IPD) at low electric field is related with data retention and the charge of the threshold voltage distribution is increased when the number of storage charges in the floating gate is increased. In order to improve data retention characteristics, the minimization of leakage current variation with respect to the applied electric field on IPD is necessary. In this paper, the effect of the electric potential of IPD on the leakage current is examined and the leakage current at low electric field is predicted. Based on the results, the method for improving the data retention by reducing the leakage current is proposed.
机译:随着存储器的按比例缩小和多层编程,数据保留特性的重要性日益提高。多晶硅层间电介质(IPD)在低电场下的泄漏电流与数据保持能力有关,并且当浮置栅极中的存储电荷数量增加时,阈值电压分布的电荷也会增加。为了改善数据保持特性,必须使泄漏电流相对于IPD上施加的电场的变化最小。本文研究了IPD电位对漏电流的影响,并预测了低电场下的漏电流。基于这些结果,提出了一种通过减小漏电流来提高数据保持能力的方法。

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  • 来源
    《Microelectronics & Reliability》 |2013年第11期|1338-1341|共4页
  • 作者单位

    School of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Korea;

    School of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Korea;

    Research and Development Division, SK Hynix Semiconductor Inc., Icheon, Republic of Korea;

    Research and Development Division, SK Hynix Semiconductor Inc., Icheon, Republic of Korea;

    Research and Development Division, SK Hynix Semiconductor Inc., Icheon, Republic of Korea;

    School of Electrical and Electronic Engineering, Yonsei University, Seoul, Republic of Korea;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
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