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首页> 外文期刊>Microelectronics & Reliability >Investigation on damaged planar-oxide of 1200 V SiC power MOSFETs in non-destructive short-circuit operation
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Investigation on damaged planar-oxide of 1200 V SiC power MOSFETs in non-destructive short-circuit operation

机译:无损短路操作中1200 V SiC功率MOSFET损坏的平面氧化物的研究

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摘要

The purpose of this paper is to present an extensive study of three 1200 V silicon carbide (SiC) Power MOSFETs in non-destructive, but leading to degradations, short-circuit operation. Unusually, as compared with equivalent device built on silicon, the damage signature is a significant gate current increase but the components are still functional. In order to find the damage location, non-destructive and destructive methods have been carried out. The results converge to a local gate oxide breakdown caused by the important electrical and thermal stress during short-circuit operation leading to different failure mechanisms depending on the device design. (C) 2017 Elsevier Ltd. All rights reserved.
机译:本文的目的是对三种1200 V碳化硅(SiC)功率MOSFET进行无损检测,但会导致性能下降和短路操作,从而进行广泛的研究。通常,与基于硅的等效器件相比,损伤特征是栅极电流显着增加,但组件仍可正常工作。为了找到损坏的位置,已经进行了非破坏性和破坏性的方法。结果收敛到局部栅极氧化物击穿,该​​局部栅极氧化物击穿是由短路操作期间的重要电应力和热应力引起的,从而导致取决于设备设计的不同故障机制。 (C)2017 Elsevier Ltd.保留所有权利。

著录项

  • 来源
    《Microelectronics & Reliability》 |2017年第9期|500-506|共7页
  • 作者单位

    Univ Toulouse, CNRS, LAPLACE, INPT,UPS, Toulouse, France;

    Univ Toulouse, CNRS, LAPLACE, INPT,UPS, Toulouse, France;

    Univ Toulouse, CNRS, LAAS CNRS, Toulouse, France;

    ENS Cachan, CNRS, SATIE, CNAM, Cachan, France;

    CNES, ITEC Lab, THLES Commun & Secur, Toulouse, France;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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