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Evaluating the material properties of underfill for a reliable 3D TSV integration package using numerical analysis

机译:使用数值分析评估可靠的3D TSV集成封装的底部填充材料的性能

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摘要

The effects of the material properties of the underfill layer on thermal stress and deformation in 3D through silicon via (TSV) integration packages were evaluated through numerical analysis. Sample TSV packages with underfill composed of different silica volume ratios were fabricated. The sample packages were used to measure thermal deformation using a Moire interferometer. Also, a cross-section from these samples was used for 2D finite element modeling and numerical analysis to obtain its thermal deformation. The experimental and numerical results were compared to confirm the suitability of the numerical technique in this research. A four-chip stacked TSV integration package, which includes underfill layers of four different silica volume ratios, was proposed and designed. The diagonal part of the TSV integration packages were three dimensionally modeled and adopted for numerical analysis. Among the underfill with different silica volume ratios in the designed packages, a silica volume ratio of around 20% shows the best performance for a reliable flip chip bonding process, effectively minimizing thermal stress and deformation in the package. (C) 2017 Elsevier Ltd. All rights reserved.
机译:通过数值分析评估了底部填充层的材料特性对通过硅通孔(TSV)集成封装进行的3D热应力和变形的影响。制备了具有由不同二氧化硅体积比组成的底部填充的样品TSV封装。使用莫尔干涉仪将样品包装用于测量热变形。而且,将这些样品的横截面用于2D有限元建模和数值分析,以获得其热变形。比较了实验结果和数值结果,证实了该数值技术在本研究中的适用性。提出并设计了一种四芯片堆叠的TSV集成封装,其中包括四种不同二氧化硅体积比的底部填充层。对TSV集成软件包的对角线部分进行了三维建模,并进行了数值分析。在设计的封装中,二氧化硅体积比不同的底部填充胶中,二氧化硅体积比约为20%,这显示了可靠的倒装芯片键合工艺的最佳性能,有效地减小了包装中的热应力和变形。 (C)2017 Elsevier Ltd.保留所有权利。

著录项

  • 来源
    《Microelectronics & Reliability》 |2017年第4期|41-50|共10页
  • 作者单位

    Chonnam Natl Univ, Sch Mech Engn, 77 Yongbong Ro, Gwangju 61186, South Korea;

    Elect & Telecommun Res Inst, Convergence Components & Mat Res Lab, 218 Gajeong Ro, Daejeon 34129, South Korea;

    Elect & Telecommun Res Inst, Convergence Components & Mat Res Lab, 218 Gajeong Ro, Daejeon 34129, South Korea;

    Elect & Telecommun Res Inst, Convergence Components & Mat Res Lab, 218 Gajeong Ro, Daejeon 34129, South Korea;

    Elect & Telecommun Res Inst, Convergence Components & Mat Res Lab, 218 Gajeong Ro, Daejeon 34129, South Korea;

    Chonnam Natl Univ, Sch Mech Engn, 77 Yongbong Ro, Gwangju 61186, South Korea;

  • 收录信息 美国《科学引文索引》(SCI);美国《工程索引》(EI);
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    3D TSV package; Underfill; Finite element method; Thermal stress; Thermal deformation; Reliability;

    机译:3D TSV封装;底部填充;有限元法;热应力;热变形;可靠性;

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