This paper will start with a discussion of why probe yeld (the number of good chips per silicon wafer) is so important to financial success in integrated circuit manufacturing. Actual data will be quoted and a numerical example shown. A simple modle will be given to demonstrate the main factors influencing yeld and the relationship between yield and reliability of th efinal product. In the last few years a range of new tools have been deployed in manufacturing, and these have accelerated the pace of yield improvement, thus increasing competitive pressures. These tools will be described, along wiht examples of their use. Topics will include in-line inspection and control, automatic defect classification and data mining techniques. A proposal is made to extend these tools to the improvement of reliability of products alread in manufacturing by maintaining absolute chip identity throughout the entire wafer fabriation, packagion, packaging and final testing steps.
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