The tungsten filled via plug process is commonly used in sub-half micron CMOS process technologies. As process technologies shrink beyond the 0.25μm generation, the metal overlap over the via also reduces. This results in vias not fully covered by the overlying interconnect lines. In the evaluation of such structures, we have observed a new failure mechanism resulting in completely unfilled vias due to electrochemeical corrosion acelerated by a positive charge on specific structures. This positive charge is collected by the metal connected to the via during metal plasma etch processing and results in electro-chemical corrosion during a subsequent solvent strip process. The charge collection is found to be dependent on the geometry of the test structure. The corrosion rate is dependent on the amount of charge and the solvent pH. Methods to limit this corrosion are discussed.
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