Mitigating single event upset of FPGA for the onboard bus control of satellite

摘要

This paper proposes a hybrid anti-radiation method to enhance the reliability of Field Programmable Gate Array (FPGA), which is being applied more and more in the commercial satellite. The method utilizes the advantages of Error Detection And Correction (EDAC) and Triple Modular Redundancy (TMR). Different bus control units are improved by different anti-radiation techniques. For finite state machine, dual-port Block Random Access Memory and EDAC are utilized. EDAC is also used to enhance First In First Output unit. For the simple control register, TMR is applied to improve its anti-radiation. This hybrid method can avoid the accumulated error of TMR and reduce the complexity of system. Experimental results show that the proposed method can correct 1-bit error and detect 2-bit error effectively.