Automated defect detection of insulated gate bipolar transistor based on computed laminography imaging

摘要

Void inspection is crucial for insulated gate bipolar transistors. X-ray computed laminography (CL) is an imaging method for plate-like objects such as insulated gate bipolar transistors. Hence, voids in CL images should be identified automatically and accurately. This paper proposes a fully automatic method of void inspection in the welding layer between a direct-bonded ceramic and a baseplate. No-reference image sharpness assessment is used to find the welding-layer slice, which confirms that the error is within one layer as compared to well-trained operators. Next, semantic segmentation network DeepLabv3+ is modified to segment the solder region and voids. Compared with conventional segmentation algorithms based on the edge and threshold, the proposed method for segmenting the solder region is free of tuning parameters. Its global accuracy and the class average accuracy can be greater than 96%. In addition, for the segmentation of voids, the proposed algorithm is found to be faster than the region-growing algorithm with an improvement in speed of about hundreds of times. Our algorithm potentially enables objective assessment of the heat exchange efficiency of IGBTs in industry.