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Reducing false positives due to double adjacent errors in instruction TLBs

机译:减少由于指令TLB中的两次相邻错误而导致的误报

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摘要

Translation lookaside buffers (TLBs) are cache structures used to make the translation process between virtual pages and physical pages faster. Instruction TLBs store the virtual page number of the last accessed instruction memory pages and the corresponding physical page numbers. Single and double adjacent errors, which are common in harsh environments, may affect TLBs. This paper presents a technique to provide instruction TLB resilience to these single and double adjacent errors without additional storage requirements, by taking advantage of the spatial locality principle that is present in program execution.
机译:转换后备缓冲区(TLB)是用于使虚拟页和物理页之间的转换过程更快的缓存结构。指令TLB存储最后访问的指令存储页的虚拟页号和相应的物理页号。在恶劣环境中常见的单个和两个相邻错误可能会影响TLB。本文提出了一种利用程序执行中存在的空间局部性原理,为这些单相邻错误和双相邻错误提供指令TLB弹性的技术,而无需其他存储要求。

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