A counter-based pseudo-exhaustive pattern generator for BIST applications

摘要

Built-in self test (BIST) has been accepted as an efficient alternative to external testing, since it provides for both test generation and response verification operations, on chip. Pseudo-exhaustive BIST generators provide 100% fault coverage for detectable combinational faults with much fewer test vectors than exhaustive testing. An (n, k) adjacent bit pseudo-exhaustive test set (PETS) is a set of n-bit vectors in which all 2~k binary combinations appear to all adjacent k-bit groups of inputs. In this paper a novel, counter-based pseudo-exhaustive BIST generator is presented, termed pseudo-exhaustive counter (PEC). An n-stage PEC can generate (n,k) adjacent bit PETS for any value of k, k < n. This kind of testing is termed Generic pseudo-exhaustive testing. A Generic pseudo-exhaustive generator can be used to pseudo-exhaustively test more than one module. The PEC scheme is then extended to recursively generate all (n,k) adjacent bit pseudo-exhaustive tests sets for k < = n. This kind of testing is termed progressive pseudo-exhaustive testing in the literature; a progressive pseudo-exhaustive generator can pseudo-exhaustively test more than one modules in parallel. Comparisons of PEC with techniques proposed in the literature that can be used for Generic and Progressive pseudo-exhaustive testing reveal that PEC is more effective in terms of both hardware overhead and time required to complete the test.