Methods for automated detection of plagiarism in integrated-circuit layouts

摘要

Student projects have always been plagued by plagiarism. Integrated-circuit (IC) design courses are no exception. Since layout is considered the most laborious part of circuit design, it is common for students to reuse their colleagues' work with some minor modifications intended to make the cheating harder to detect. While software detecting plagiarism in text or computer code is commonly used these days, no counterpart exists for IC layouts. This paper proposes several criteria of IC-layout dissimilarity that can be used for computer-aided layout matching. A program based on these criteria is shown to successfully identify similar layouts in a pool of designs.