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首页> 外文期刊>Microelectronics journal >0.7-V supply, 21-nW All-MOS voltage reference using a MOS-Only current-driven reference core in digital CMOS
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0.7-V supply, 21-nW All-MOS voltage reference using a MOS-Only current-driven reference core in digital CMOS

机译:0.7V电源,21-NW全部MOS电压参考,使用Digital CMOS中的MOS-Only驱动的参考核心

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A nano-power all-MOS voltage reference circuit is proposed without any integrated resistor or bipolar transistor to generate multiple voltage sources in inexpensive digital CMOS technologies. The design is based on a current-driven voltage reference core made by standard nMOS transistors only, and can be powered up by a flexible biasing current with no consideration on its temperature characteristics. The sensitive core is shielded from the unregulated voltage supply via a voltage follower MOS transistor, whose gate terminal is driven by a supply-insensitive voltage source coming from the internal biasing configuration. The additional voltage reference is generated using the type of the biasing current made by the main voltage reference loaded by a transistor. A MOS-only implementation of the proposed reference employs MOS devices instead of passive resistors and linear capacitors. A prototype of the proposed solution consumes 30 nA with an area of 0.01 mm(2) in 0.18-mu m CMOS process, producing a main voltage reference of 147 mV while operating at the supply voltage down to 0.7 V. Simulation results demonstrate an average temperature coefficient (TC) of 66.38 ppm/degrees C for a temperature range of -40 to 120 degrees C. The line sensitivity is about 0.031%/V for the line voltages above 1.3 V. The mean power supply rejection ratio (PSRR) is -90 dB and -64.4 dB at 10 Hz and 1 MHz, respectively, when the voltage supply is set to 1.8 V and an equivalent MOS capacitor of 5 pF is used at the output. The 1% start-up settling time is 240 mu s for a 1.0 V voltage supply step, and can be reduced by increasing the supply voltage magnitude.
机译:建议在没有任何集成电阻器或双极晶体管的情况下提出了一种纳米功率全部MOS电压参考电路,以在廉价的数字CMOS技术中产生多电压源。该设计基于仅由标准NMOS晶体管制成的电流驱动的电压参考核心,并且可以通过柔性偏置电流来供电,没有考虑其温度特性。敏感芯通过通过电压跟随器MOS晶体管从未管电压供应屏蔽,其栅极端子由来自内部偏置配置的供应不敏感电压源驱动。使用由晶体管加载的主电压基准的偏置电流的类型产生附加的电压参考。仅应用了所提出的MOS器件而不是无源电阻器和线性电容器的MOS的实施。所提出的解决方案的原型在0.18-mu M CMOS工艺中消耗30nA,面积为0.01mm(2),在电源电压下运行至0.7V的同时产生147 mV的主电压参考。仿真结果展示了平均值温度系数(Tc)为66.38ppm /℃的温度范围-40至120℃。线路敏感度为1.3 V上方的线电压约0.031%/ v.平均电源排斥比(PSRR)是分别为10Hz和1 MHz的-90 dB和-64.4 dB,当电压电源设定为1.8V时,输出时使用5 PF的等效MOS电容。对于1.0V电压电源步骤,1%启动稳定时间为240μS,可以通过增加电源电压幅度来降低。

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