Self-aligned N-channel Gaas Metal-oxide-semiconductor Field-effect Transistors (mosfets) Using Hfo_2 And Silicon Interface Passivation Layer: Post-metal Annealing Optimization

摘要

In this work, using Si interface passivation layer (IPL), we demonstrate n-MOSFET on p-type GaAs by varying physical-vapor-deposition (PVD) Si IPL thickness, S/D ion implantation condition, and different substrate doping concentration and post-metal annealing (PMA) condition. Using the optimized process, TaN/HfO_2/GaAs n-MOSFETs made on p-GaAs substrates exhibit good electrical characteristics, equivalent oxide thickness (EOT) (～3.7 nm), frequency dispersion (～8%) and high maximum mobility (420 cm~2/V s) with high temperature PMA (950 ℃, 1 min) and good inversion.