Synthesis of carbon nanotubes and graphene for VLSI interconnects

摘要

The synthesis of carbon nanotubes and multi-layer graphene for use as VLSI interconnects is reviewed. It is shown that a variety of catalyst pre-treatments can be used to grow vertically aligned carbon nanotube forests with a very high density by chemical vapour deposition, obtaining area densities of order 1.4 × 10~(13)cm~(-2). For carbon-based horizontal interconnects, there are three available processes; the direct horizontal growth of carbon nanotubes, the flipping down of vertically oriented carbon nanotubes, or the catalytic growth of multilayer graphene. Graphene CVD should adopt lower temperature catalysts such as Ni or Co alloys for this application. It is emphasised that the growth methods must be compatible with integration.