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A novel fault tolerant majority gate in quantum-dot cellular automata to create a revolution in design of fault tolerant nanostructures, with physical verification

机译:量子点元胞自动机中的新型容错多数门通过物理验证掀起了容错纳米结构设计的革命

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摘要

There are some challenges in CMOS circuits, one of the most important of which is the size of the feature. Alternative technologies such as quantum-dot cellular automata (QCA) are emerging to solve this problem. In QCA, the scale of main structures is very small, which can cause faults. There are several ways to overcome this problem. One of them is the design and use of the fault-tolerant majority gates. The majority gate is one of the most widely used components in designing QCA structures. In this paper, we propose a new fault-tolerant majority gate. We investigate the performance of the proposed structure when common faults occur, and then we compare the results with previous structures. Using this structure, we propose a new structure for a fault-tolerant full-adder. QCADesigner is used to implement and simulate proposed structures. Physical verification is used to confirm the results. (C) 2018 Elsevier B.V. All rights reserved.
机译:CMOS电路存在一些挑战,其中最重要的挑战之一就是特征的尺寸。解决这一问题的替代技术正在出现,例如量子点细胞自动机(QCA)。在QCA中,主要结构的规模很小,可能会导致故障。有几种方法可以解决此问题。其中之一是容错多数门的设计和使用。多数栅极是设计QCA结构时使用最广泛的组件之一。在本文中,我们提出了一种新的容错多数门。当出现常见故障时,我们研究了所提出结构的性能,然后将结果与先前结构进行了比较。使用这种结构,我们提出了一种用于容错全加器的新结构。 QCADesigner用于实现和模拟建议的结构。物理验证用于确认结果。 (C)2018 Elsevier B.V.保留所有权利。

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