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SoC Test Data Compression Technique Based on RLE-G

机译:基于RLE-G的SoC测试数据压缩技术

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摘要

Test data compression has been an effective way to reduce test data volume and test time, as well as to solve automatic test equipment (ATE) memory and bandwidth limitation. We analyze the limitations of current test data compression algorithm and draw on the previous experience to deduce an optimal compression coding model suitable for SoC test data. In addition, in this paper we make full use of the relevance of the test vectors and the advantages of statistical coding to present an efficient test data compression method RLE-G based on the coding model, and give the RLE-G the optimal compression efficiency of the boundary conditions and realization steps. The experimental results for ISCAS 89 benchmark circuits demonstrate RLE-G have the excellent advantages of high compression ratio.
机译:测试数据压缩一直是减少测试数据量和测试时间以及解决自动测试设备(ATE)内存和带宽限制的有效方法。我们分析了当前测试数据压缩算法的局限性,并借鉴以前的经验得出了适合SoC测试数据的最佳压缩编码模型。另外,本文充分利用测试向量的相关性和统计编码的优点,提出了一种基于编码模型的有效测试数据压缩方法RLE-G,并为RLE-G提供了最佳的压缩效率。边界条件和实现步骤。 ISCAS 89基准电路的实验结果表明RLE-G具有高压缩比的出色优势。

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  • 来源
    《Key Engineering Materials》 |2010年第2期|P.1595-1600|共6页
  • 作者单位

    University of Electronic Science and Technology of China, Zhongshan Institute, China;

    University of Electronic Science and Technology of China, Zhongshan Institute, China;

    Changchun Institute of Optics, Fine Mechanics and Physics, Chinese Academy of Science, China;

    University of Electronic Science and Technology of China, Zhongshan Institute, China;

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  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

    system on a chip; test data compression; RLE-G coding;

    机译:片上系统;测试数据压缩;RLE-G编码;

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