机译:基于算法/架构协同设计的去隔行可重构架构
Media SoC Lab., Department of Electrical Engineering,National Cheng Kung University,No.l, Ta-Hsueh Road, Tainan,701 Taiwan, R.O.C;
Media SoC Lab., Department of Electrical Engineering,National Cheng Kung University,No.l, Ta-Hsueh Road, Tainan,701 Taiwan, R.O.C;
Media SoC Lab., Department of Electrical Engineering,National Cheng Kung University,No.l, Ta-Hsueh Road, Tainan,701 Taiwan, R.O.C;
Media SoC Lab., Department of Electrical Engineering,National Cheng Kung University,No.l, Ta-Hsueh Road, Tainan,701 Taiwan, R.O.C;
Media SoC Lab., Department of Electrical Engineering,National Cheng Kung University,No.l, Ta-Hsueh Road, Tainan,701 Taiwan, R.O.C;
Media SoC Lab., Department of Electrical Engineering,National Cheng Kung University,No.l, Ta-Hsueh Road, Tainan,701 Taiwan, R.O.C;
Media SoC Lab., Department of Electrical Engineering,National Cheng Kung University,No.l, Ta-Hsueh Road, Tainan,701 Taiwan, R.O.C;
deinterlacer- reconfigurable architecture; algorithm/architecture co-design;
机译:粗粒度间可重配置体系结构重配置技术,可在基于粗粒度可重配置体系结构的多核体系结构上有效地流化内核流
机译:在65-NM CMOS中使用内存入门计数的基于内存入口计数的算法 - 电路 - 电路 - 电路架构的通信感知DNN加速器
机译:使用电路架构软件协同设计方法的节能型可重构计算
机译:宽范围ELA去隔行器的算法和架构设计
机译:用于高吞吐量媒体处理应用程序的资源有效的粗粒度可重新配置体系结构的硬件软件协同设计。
机译:基于可重构逻辑的新型低成本体系结构的实时代数导数估计
机译:协同设计用于移动机器人定位和基于模型的障碍物检测的体系结构和算法
机译:并行算法到可重构并行体系结构的映射