机译:灰度Stego的层路由器-FPGA和ASIC平台上的硬件架构
School of Electrical & Electronics Engineering, SASTRA University, India;
School of Electrical & Electronics Engineering, SASTRA University, India;
Electrical Engineering, Linkoping University, Sweden;
School of Electrical & Electronics Engineering, SASTRA University, India;
School of Electrical & Electronics Engineering, SASTRA University, India;
Hardware Steganography; FPGA; ASIC; Information security;
机译:无监督图像阈值:FPGA-SoC平台的硬件架构及其使用
机译:在基于FPGA的平台上实现的高吞吐量并行DWT硬件架构
机译:一种致力于模型预测控制法的硬件/软件架构,并实现为FPGA平台
机译:ASIC硬件仿真器的FPGA架构
机译:用于FPGA的半流式卷积神经网络硬件架构的层型专业处理引擎
机译:高效的BinDCT硬件架构探索和FPGA实现
机译:Lea-Siot:FPGA平台安全IOT的轻质加密算法的硬件架构
机译:用于FpGa和asIC中超长FFT的高效架构