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机译:用于实时UHD视频编码的绝对差异架构总和的高阶加法器压缩机的功率降低
Univ Fed Rio Grande do Sul Grad Program Microelect PGMicro 67 215 Av Bento Goncalves 9500 BR-91501970 Porto Alegre RS Brazil;
Univ Fed Rio Grande do Sul Grad Program Microelect PGMicro 67 215 Av Bento Goncalves 9500 BR-91501970 Porto Alegre RS Brazil;
Univ Fed Rio Grande do Sul Grad Program Microelect PGMicro 67 215 Av Bento Goncalves 9500 BR-91501970 Porto Alegre RS Brazil;
Univ Fed Rio Grande do Sul Grad Program Microelect PGMicro 67 215 Av Bento Goncalves 9500 BR-91501970 Porto Alegre RS Brazil;
Catholic Univ Pelotas UCPel Grad Program Elect Engn & Comp Sci Av Goncalves Chaves 373 BR-96015560 Pelotas RS Brazil;
Catholic Univ Pelotas UCPel Grad Program Elect Engn & Comp Sci Av Goncalves Chaves 373 BR-96015560 Pelotas RS Brazil;
Univ Fed Rio Grande do Sul Grad Program Microelect PGMicro 67 215 Av Bento Goncalves 9500 BR-91501970 Porto Alegre RS Brazil;
Video coding; Hardware architecture; HEVC; SAD; Low power; Adder compressors;
机译:使用加法器压缩机进行整数运动估计的高效节能绝对差硬件架构
机译:使用动态迭代控制和分层加法器压缩器的高效SDS运动估计架构,用于实时HDTV视频编码
机译:基于新绝对差计算的新总和的HEVC低功率运动估计架构
机译:使用加法器和减法器压缩器对绝对转换差值求和的体系结构进行低功耗视频编码
机译:实时和低功耗HEVC去块滤波器架构定位8K UHD @ 60FPS视频