Self adaptable high throughput reconfigurable bilateral filter architectures for real-time image de-noising

摘要

A bilateral filter is a local, non-iterative and non-linear technique which aids in removing the noise while preserving edges and details. This work proposes novel highly parallel-pipelined low complex bilateral filter architectures to achieve high throughput, high efficiency, self adaptability and reconfigurability in a real-time noisy environment. The design implements true bilateral filter by adaptively varying the filter parameters to achieve error tolerance less than 4%. The proposed architecture can denoise up to 4K UHD (2160 p @ 53 fps) video stream at real-time. The design improves the throughput by 88%, reduces resource utilization and latency by 30 and 60% respectively than the state of the art architectures. The proposed fixed and floating point implementation achieves a power efficiency of 318 GOPS/W and 37 GFLOPS/W respectively. The dynamic reconfigurability of the design allows to switch from high efficiency to high throughput mode in less than 4.2 ms. The evaluation of a real time denoising system on FullHD (1080 p) video stream is performed on Virtex-7 FPGA. A comparison with Virtex-5 FPGA implementation shows the robust performance of the architecture across different FPGA families.