Threaded MPI programming model for the Epiphany RISC array processor

摘要

The low-power Adapteva Epiphany RISC array processor offers high computational energy-efficiency and parallel scalability. However, extracting performance with a standard parallel programming model remains a great challenge. We present an effective programming model for the Epiphany architecture based on the Message Passing Interface (MPI) standard adapted for coprocessor offload. Using MPI exploits the similarities between the Epiphany architecture and a networked parallel distributed cluster.