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Modelling and simulation of carrier transport in quantum dot memory device for longer data retention and minimized power consumption

机译:量子点内存装置中载波运输的建模与仿真,用于更长的数据保留和最小化功耗

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The performance of a group III-V material quantum dot (QD) nanostructure memory is investigated using a self-consistent Schrodinger solver, eight-bandk center dot pmodel, and carrier dynamics modelling. This model is used to explore the information loss due to the carrier emission rate in the QDs as a function of temperature, size and confinement potential. The results reveal the dominant emission mechanisms that should occur at different operating temperatures. To minimize the loss and improve the performance at room temperature, our findings reveal an increase in the carrier storage time and a reduction in the power dissipation with increasing dot size. It is further illustrated that electrons are advantageous as information carriers over holes and that the inclusion of high-bandgap barrier layers favours longer-duration data retention. The model is extended to include trap states in realistic QDs, whose effect is found to become more prominent with performance optimization. The computed results are in close agreement with other experimental data for different QDs along with barrier layer. This validates the efficacy of the model, which can be utilized as a design tool for fabricating nanoscale memories with better data retention capability.
机译:使用自我一致的Schrodinger求解器,八带中心点Pmodel和载体动力学建模来研究III-V材料量子点(QD)纳米结构存储器的性能。该模型用于探索由于QDS中的载波发射率而导致的信息损耗,作为温度,尺寸和限制潜力的函数。结果揭示了应在不同的操作温度下发生的主要排放机制。为了最大限度地减少损失并改善室温的性能,我们的研究结果揭示了载流子储存时间的增加和随着点尺寸的增加而减少功耗。进一步示出了电子是有利的,作为信息载体在孔上,并且包括高带隙屏障层的包含较长持续时间的数据保持。该模型扩展到包括现实QD中的陷阱状态,其效果被发现与性能优化变得更加突出。计算结果与不同QD的其他实验数据密切一致,以及阻挡层。这验证了模型的功效,其可以用作制造具有更好数据保持能力的纳米级存储器的设计工具。

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