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首页> 外文期刊>Journal of ambient intelligence and humanized computing >Crosstalk minimization in network on chip (NoC) links with dual binary weighted code CODEC
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Crosstalk minimization in network on chip (NoC) links with dual binary weighted code CODEC

机译:芯片(NOC)链路中的串扰最小化,双二进制加权代码编解码器

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A number of bus encoding techniques are renowned in low power dissipation of network-on-chip. The objective of the proposed algebraic framework dual binary weighted code (DBWC) technique is to prevent the triplet opposite direction transition wholly in the network on chip links and reduces the troublesome cross talk delay. The additional aim is to utilize only six links for the entire five bit input range instead of seven links which have been used by other existing methods. The results of implementation show that the proposed method DBWC encoder reduces 9.492% of cell leakage power than the IMP FIBO encoder and 60.03% less than S2AP encoder. Likewise, the decoder cuts 18.43% of cell leakage power than the IMP FIBO decoder and 5.06% fewer than S2AP decoder.
机译:许多总线编码技术在芯片上的低功耗耗散中着名。 所提出的代数框架双二进制加权码(DBWC)技术的目的是防止在芯片链路上的网络中完全相反的方向转换,并减少了麻烦的交叉谈话延迟。 额外的目的是仅利用整个五位输入范围而不是其他现有方法使用的七个链路。 实施结果表明,所提出的方法DBWC编码器比IMP FIBO编码器降低了9.492%的电池泄漏功率,比S2AP编码器小60.03%。 同样,解码器切割的18.43%的电池漏功率比IMP FIBO解码器,比S2AP解码器少5.06%。

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