Rectification of four or more design errors in a combinational circuit based on the EXM- algorithm, an existing algorithm for logic diagnosis, has been difficult due to processing time. This paper presents a logic diagnosis technique applicable to four or more design errors employing iterative diagnosis procedure for subcircuits extracted based on the correctness of primary output functions. By handling the subcircuits, the proposed algorithm reduces both the number of gates and the number of logic design errors to be considered at once for logic diagnosis. Experimental results demonstrate that most of circuits including four or more design errors can be rectified within shorter processing time.
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