An Exploration of Instruction Fetch Requirement in Out-of-Order Superscalar Processors

摘要

The performance of superscalar processors depends on many parameters with correlated effects. This paper explores the relations between some of these parameters, and more particularly, the requirement in instruction fetch band- width. We introduce new enhancements to increase the bandwidth of conven- tional instruction fetch engines. However, experiments show that the perfor- mance does not increase proportionally to the fetch.